Simulation Analysis of Narrow Width Effect in Nano Structured Fully Depleted SOI MOSFET
Author:
Publisher
Elsevier BV
Subject
General Engineering
Reference5 articles.
1. H. K. Lim and J. G. Fossum, Threshold voltage of thin-film silicon-on-insulator(SOI) MOSFETs, IEEE Trans. Electron Devices, 1983, 30(10), 1244-1251.
2. Colinge J. P. Thin-Film SOI Technology: The Solution to many submicron CMOS Problems IEDM dig.,(1989), 817-820.
3. L. Chang et al., Extremely scaled silicon nano CMOS devices, Proc.IEEE, 2003, 91(11), 1860-1873.
4. Sheng-Lyang Jang and Bohr-Ran Huang, and Jiann-Jong Ju “A Unified Analytical Fully Depleted and Partially Depleted SOI MOSFET Model” IEEE Transactions on Electron Devices, Vol. 46, No. 9, pp.1872-1876, September 1999.
5. J. C. S. Woo, K.W. Terrill, and P. K. Vasudev, “Two dimensional analytic modeling of very thin SOI MOSFETs,” IEEE Trans. Electron Devices, vol. 37, pp. 1999-2006, 1990.
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1. Modeling and analysis of surface potential of single gate fully depleted SOI MOSFET using 2D-Poisson’s equation;AIP Conference Proceedings;2016
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