Fault models of CMOS circuits-Reference-Cited by-同舟云学术

Fault models of CMOS circuits

Published:1994-05 Issue:5 Volume:34 Page:883-896
ISSN:0026-2714
Container-title:Microelectronics Reliability
language:en
Short-container-title:Microelectronics Reliability

Author:

Milovanović Dragiša P.,Litovski Vančo B.

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference14 articles.

1. VLASIC: A catastrophic fault yield simulator for integrated circuits;Walker;IEEE Transaction on Computer-Aided Design,1986

2. A CMOS fault extractor for inductive fault analysis;Ferguson;IEEE Transaction on Computer-Aided Design,1988

3. Digital systems testing and testable design;Abramovici,1990

4. Modeling faults in digital logic circuits;Hayes,1977

5. Physical versus logical fault models MOS LSI circuits: impact on their testability;Galiay;IEEE Transactions on Computers,1980

Cited by 7 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Transistor-level to gate-level comprehensive fault synthesis for n-input primitive gates;Microelectronics Reliability;2006-12

2. Analogue electronic circuit diagnosis based on ANNs;Microelectronics Reliability;2006-08

3. Test generation for technology-specific multi-faults based on detectable perturbations;Microelectronics Reliability;2005-01

4. Concurrent analogue fault simulation, the equation formulation aspect;International Journal of Circuit Theory and Applications;2004

5. Time-domain analysis of nonlinear switched networks with internally controlled switches;IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications;1999-03