1. Ono M, Saito M, Yoshitomi T, Fiegnu, C, Ohguro T, Iwai H. Sub-50nm gate length n-MOSFETs with 10nm phosphorous source and drain junctions. IEDM Tech Dig 1993:119–22.
2. Singh R. DEvelopment trends in ultra thin gate dielectrics for ultra large scale integration (ULSI). In: Proc 1984 Int, Microelectronics Symp. Int. Soc. for Hybrid Microelectronics, 1984:386–93
3. Performance and reliability of thin gate dielectrics for VLSI: Materials and processing perspective;Singh;Mat Res Soc,1986
4. Singh R. Theory of MIS and SIS solar cells: Ph.D. thesis, McMaster University, 1979
5. Review of conductor–insulator–semiconductor solar cells;Singh;Sol Cells,1981