A self-isolated and efficient power device for HVIC's: RESURF LDMOS with SIPOS layers-Reference-Cited by-同舟云学术

A self-isolated and efficient power device for HVIC's: RESURF LDMOS with SIPOS layers

Published:1992-09 Issue:1-4 Volume:19 Page:149-152
ISSN:0167-9317
Container-title:Microelectronic Engineering
language:en
Short-container-title:Microelectronic Engineering

Author:

Charitat G.,Bouanane M.A.,Rossel P.

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference12 articles.

1. Impact of Dielectric Isolation Technology on Power IC's;Nakagawa,1991

2. A very High Voltage Technology (up to 1200 V) for Vertical Smart Power IC's;Mille,1989

3. High Voltage Thin Layer Devices (RESURF Devices);Appels;proc. IEDM,1979

4. Bidimensional Analysis of High Voltage RESURF LDMOS for Smart Power Integrated Circuits: On and Off State;Charitat,1989

5. Modélisation et réalisation de composants planar haute-tension;Charitat,1990

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