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Design and optimization of thin film fully depleted vertical surrounding gate (VSG) MOSFETs for enhanced short channel immunity

  • Published:2002-09 Issue:9 Volume:46 Page:1333-1338
  • ISSN:0038-1101
  • Container-title:Solid-State Electronics
  • language:en
  • Short-container-title:Solid-State Electronics

Author:

Kranti Abhinav,Rashmi ,Haldar S,Gupta R.S

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference12 articles.

1. The national technology roadmap for semiconductors,1999

2. Scaling the Si MOSFET: from bulk to SOI to bulk;Yan;IEEE Trans Electron Dev,1992

3. Impact of surrounding gate transistor (SGT) for ultra high density LSI's;Takato;IEEE Trans Electron Dev,1991

4. Multi pillar surrounding gate transistor (M-SGT) for compact and high speed circuits;Nitayama;IEEE Trans Electron Dev,1991

5. Numerical analysis of a cylindrical thin pillar transistor (CYNTHIA);Miyano;IEEE Trans Electron Dev,1992

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