1. Joohee Kim, Jonghyun Cho, and Joungho Kim Terahertz Interconnection and Package Laboratory, KAIST, Daejeon, Korea “TSV Modeling and Noise Coupling in 3D IC”, 3rd Electronics System Integration Technology Conference ESTC, Sep.2010.
2. Jonghyun Cho, Kihyun Yoon, Jun So Pak, Joohee Kim, Junho Lee, Hyungdong Lee, Kunwoo Park and Joungoho Kim, Terahertz Interconnection and Package Laboratory, KAIST, Daejeon, Korea “Guard Ring Effect for Through Silicon Via (TSV) Noise Coupling Reduction”,2010 IEEE CPMT Symposium Japan,Aug.2010.
3. Shinichiro Uemura, Yukio Hiraoka, Takayuki Kai and Shiro Dosho StrATEGIC Semiconductor Development Center, Panasonic Corp. 3-1-1 Yagumo-naka-machi, Moriguchi,Osaka,Japan Production Engineering Laboratory, Panasonic Corp. “Isolation Techniques against Substrate Noise Coupling Utilizing Through Silicon Via(TSV) for RF/Mixed-Signal SoCs” IEEE Journal of Solid-State Circuits(Volume: 47,Issue: 4, April 2012) Feb. 2012.
4. R Ranga Reddy, Sugandh Tanna,Dr. Shiv Govind Singh and Om Krishna Singh, “TSV Noise Coupling in 3D IC using Guard Ring”, 2015 International 3D Systems Integration Conference (3DIC), sep.2015.
5. Suraj Patil, Asisa Kumar Panigrahi, Satish Bonam, C. Hemanth Kumar, Om Krishan Singh, and Shiv Govind Singh, Department of Electrical Engineering, “Improved noise coupling performance using optimized Teflon liner with different TSV structures for 3D IC integration”. 2016 IEEE International 3D Systems Integration Conference (3DIC).Nov.2016.