A Novel high-speed low power 9T full adder

Author:

Kumar Sreeja S.,Rakesh S.

Publisher

Elsevier BV

Subject

General Medicine

Reference8 articles.

1. Virani Nafeez, Nikitha.M. V and Sunil MP, “A Novel Ultra-Low Power and PDP 8T Full Adder Design Using Bias Voltage”, 2nd International Conference for Convergence in Technology(I2CT),2017

2. “Comparative analysis of 10T and 14T full adder at 45nm Technology;Johri,2012

3. “A Novel CMOS 1-bit 8TFull Adder Cell”, World Scientific and Engineering;Tripti Sharma;Academy and Society (WSEAS) Transactions on Systems,2010

4. TriptiSharma,K G Sharma,B P Singh(2010), “High Performance Full Adder Cell: A Comparative Analysis,” Proceedings of the 2010 IEEE Student’s Technology Symposium, 3-4 April,Kharagpur.

5. Tripti Sharma, B P Singh,K G Sharma(2010) “High Speed, Low Power 8T Full Adder Cell with 45% Improvement in Threshold Loss Problem,” Proceedings of the 12th International Conference on Networking, VLSI and Signal Processing, pp. 272- 276, Coimbatore and University of Cambridge, UK.

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