Logic synthesis for FPGAs based on cutting of BDD-Reference-Cited by-同舟云学术

Logic synthesis for FPGAs based on cutting of BDD

Published:2017-07 Issue: Volume:52 Page:173-187
ISSN:0141-9331
Container-title:Microprocessors and Microsystems
language:en
Short-container-title:Microprocessors and Microsystems

Author:

Kubica Marcin,Opara Adam,Kania Dariusz

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference50 articles.

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2. The decomposition of switching functions;Ashenhurst,1957

3. Input driven synthesis on PLDs and PGAs;Babba,1992

4. Shared multi-terminal binary decision diagrams for multiple-output functions;Babu,1998

5. Berkeley Logic Synthesis Group, ABC: A System for Sequential Synthesis and Verification, Dec. 2005. [Online]. Available: http://www.eecs.berkeley.edu/∼alanmi/abc.

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