Author:
Rethinagiri Santhosh Kumar,Palomar Oscar,Sobe Anita,Yalcin Gulay,Knauth Thomas,Titos Gil Rubén,Prieto Pablo,Schneegaß Malte,Cristal Adrian,Unsal Osman,Felber Pascal,Fetzer Christof,Milojevic Dragomir
Funder
European Community’s Seventh Framework Programme
Subject
Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software
Reference32 articles.
1. Dark silicon and the end of multicore scaling;Esmaeilzadeh,2011
2. M. Baron, The single-chip cloud computer, Tech. rep., Microprocessor Report, June 2010.
3. G. Yalcin, A. Cristal, O. Unsal, A. Sobe, D. Harmanci, P. Felber, A. Voronin, J.-T. Wamhoff, C. Fetzer, Combining error detection and transactional memory for energy-efficient computing below safe operation margins, in: 22nd Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP), 2014, 2014, pp. 248–255, http://dx.doi.org/10.1109/PDP.2014.61.
4. Reducing power by optimizing the necessary precision/range of floating-point arithmetic;Tong;IEEE Trans. Very Large Scale Integ. (VLSI) Syst.,2000
5. Reducing soft errors through operand width aware policies;Ergin;IEEE Trans. Depend. Sec. Comput.,2009
Cited by
6 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献