1. R. Moreno, L. Pinuel, S. del Pino, F. Tirado, A power perspective of value speculation for Superscalar microprocessors, in: Proceedings of International Conference on Computer Design, 2000, pp. 147–154.
2. J.J. Yi, D.J. Lilja, An analysis of the amount of global level redundant computation in the SPEC95 and SPEC2000 benchmarks, in: Proceedings of International Workshop on Workload Characterization, 2001, pp. 74–81.
3. D. Parikh, K. Skadron, Z. Yan, M. Barcella, M.R. Stan, Power issues related to branch prediction, in: Proceedings of the 8th International Symposium on High-Performance Computer Architecture, 2002, pp. 211–222.
4. B. Calder, G. Reinman, D.M. Tullsen, Selective value prediction, in: Proceedings of the 26th International Symposium on Computer Architecture, 1999, pp. 64–74.
5. R. Bhargava, L.K. John, Latency and energy aware value prediction for high-frequency processors, in: Proceedings of the 16th International Conference on Supercomputing, 2002, pp. 45–56.