Apple-CORE: Harnessing general-purpose many-cores with hardware concurrency management

Author:

Poss R.,Lankamp M.,Yang Q.,Fu J.,van Tol M.W.,Uddin I.,Jesshope C.

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference49 articles.

1. Coming challenges in microarchitecture and architecture;Ronen;Proceedings of the IEEE,2001

2. Chip multithreading: opportunities and challenges;Spracklen,2005

3. The free lunch is over: a fundamental turn toward concurrency in software;Sutter;Dr. Dobb’s Journal,2005

4. Apple-CORE: Microgrids of SVP cores (invited paper);Poss,2012

5. Hitting the memory wall: implications of the obvious;Wulf;SIGARCH Computer Architecture News,1995

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1. AM : Towards A Hardware Unix Accelerator for Many-Cores;IEEE Transactions on Parallel and Distributed Systems;2016-08-01

2. One-IPC high-level simulation of microthreaded many-core architectures;The International Journal of High Performance Computing Applications;2016-07-28

3. Cache-based high-level simulation of microthreaded many-core architectures;Journal of Systems Architecture;2014-08

4. On-chip traffic regulation to reduce coherence protocol cost on a microthreaded many-core architecture with distributed caches;ACM Transactions on Embedded Computing Systems;2014-03

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