Yield-aware joint die packing, die matching and static thread mapping for hard real-time 3D embedded CMPs

Author:

Siavashi AhmadORCID,Momtazpour MahmoudORCID

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference47 articles.

1. Dynamic thermal management in 3D multicore architectures;Coskun,2009

2. Dynamically heterogeneous cores through 3D resource pooling;Homayoun,2012

3. Thermal-aware task scheduling for 3D multicore processors;Zhou;IEEE Trans. Parallel Distrib. Syst.,2010

4. Statistical thermal evaluation and mitigation techniques for 3D chip-multiprocessors in the presence of process variations;Juan,2011

5. K. Chakraborty, S. Roy, Rethinking threshold voltage assignment in 3D multicore designs, in: Proceedings of the IEEE International Conference on VLSI Design, (ISSN: 10639667) ISBN: 9780769539287, 2010.

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