Cross-layer analysis of software fault models and countermeasures against hardware fault attacks in a RISC-V processor

Author:

Laurent Johan,Beroulle Vincent,Deleuze Christophe,Pebay-Peyroula Florian,Papadimitriou Athanasios

Funder

Agence Nationale de la Recherche

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference27 articles.

1. On the importance of checking cryptographic protocols for faults;Boneh,1997

2. Joint Interpretation Library, “Application of attack potential to smartcards.” Jan-2013.

3. High level model of control flow attacks for smart card functional security;Berthomé,2012

4. Synthesis of fault attacks on cryptographic implementations;Barthe,2014

5. QEMU-Based fault injection for a system-level analysis of software countermeasures against fault attacks;Höller,2015

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2. MAFIA: Protecting the Microarchitecture of Embedded Systems Against Fault Injection Attacks;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-12

3. CIFER: Code Integrity and control Flow verification for programs Executed on a RISC-V core;2023 IEEE International Symposium on Hardware Oriented Security and Trust (HOST);2023-05-01

4. Cross-layer inference methodology for microarchitecture-aware fault models;Microelectronics Reliability;2022-12

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