Undeviating Adaptive Sheltered Cryptography (UASC) method based low power and high secure cache memory design-Reference-Cited by-同舟云学术

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Undeviating Adaptive Sheltered Cryptography (UASC) method based low power and high secure cache memory design

Published:2019-11 Issue: Volume:71 Page:102876
ISSN:0141-9331
Container-title:Microprocessors and Microsystems
language:en
Short-container-title:Microprocessors and Microsystems

Author:

Sai R. Vijay,Upadhyay Har Narayan,Prabhu M.,Saravanan S.

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference21 articles.

1. Reactive-associative caches;Vijaykumar,2011

2. Way-tagged cache: an energy-efficient L2 cache architecture under write-through policy;Dai,2009

3. Soft error rates in 65 nmSRAMs: analysis of new phenomena;Ruckerbauer,2007

4. Balancing performance and reliability in the memory hierarchy;Asadi,2005

5. Reducing of error vulnerability of data caches;Vera,2007

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An Advanced Encryption Standard in Memory (AESIM) Efficient, High Performance S-box Based AES Encryption and Decryption Architecture on VLSI;Wireless Personal Communications;2021-10-29

2. Improving security against cache memory attacks for dual field multiplier design based on elliptic curve cryptography;Journal of Ambient Intelligence and Humanized Computing;2021-01-05

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