1. R. Hartenstein, A decade of reconfigurable computing: a visionary retrospective, in: Proc. ACM/IEEE DATE ’01, pp. 642–649.
2. Pact Corporation, The XPP white Paper, Technical Report , 2005.
3. ADRES: an architecture with tightly coupled VLIW processor and coarse grained reconfigurable matrix;Mei;Proc. FPL ’03,2003
4. MorphoSys: an integrated reconfigurable system for data-parallel and communication-intensive applications;Singh;IEEE Trans. Comput.,2000
5. A quantitative analysis of reconfigurable coprocessors for multimedia applications;Miyamori;IEEE Sympos. FPGAs Custom Comput. Machines,1998