FBNoC: FPGA-based network on chip emulator for full-system architectural simulation of many-core systems-Reference-Cited by-同舟云学术

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FBNoC: FPGA-based network on chip emulator for full-system architectural simulation of many-core systems

Published:2018-09 Issue: Volume:61 Page:72-85
ISSN:0141-9331
Container-title:Microprocessors and Microsystems
language:en
Short-container-title:Microprocessors and Microsystems

Author:

Ahmed Gamil A.,Elrabaa Muhammad E.S.^ORCID

Funder

King Fahd University of Petroleum and Minerals

King Abdulaziz City for Science and Technology

National Plan for Science, Technology and Innovation

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference29 articles.

1. Route packets, not wires: on-chip interconnection networks;Dally,2001

2. Garnet: a detailed on-chip network model inside a full-system simulator;Agarwal,2009

3. Simflex: a fast, accurate, flexible full-system simulation framework for performance evaluation of server architecture;Hardavellas;ACM SIGMETRICS Perform. Eval. Rev.,2004

4. Principles and Practices of Interconnection Networks;Dally,2004

5. Sicosys: an integrated framework for studying interconnection network performance in multiprocessor systems;Puente,2002

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Design alternatives of Network- on-Chip (NoC) Router microarchitecture for future Communication System;2022 International Conference on Advances in Computing, Communication and Applied Informatics (ACCAI);2022-01-28

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