Analysis of the subthreshold CMOS logic inverter-Reference-Cited by-同舟云学术

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Analysis of the subthreshold CMOS logic inverter

Published:2018-12 Issue:4 Volume:9 Page:1001-1017
ISSN:2090-4479
Container-title:Ain Shams Engineering Journal
language:en
Short-container-title:Ain Shams Engineering Journal

Author:

Sharroush Sherif M.

Publisher

Elsevier BV

Subject

General Engineering

Reference66 articles.

1. Multi-voltage CMOS circuit design;Kursen,2006

2. Cramming more components onto integrated circuits;Moore;Proc IEEE,1998

3. Progress in digital integrated electronics;Moore,1975

4. Allam MW. New methodologies for low-power high-performance digital VLSI design. Doctor of philosophy thesis, Waterloo, Ontario, Canada; 1999.

5. Low-power CMOS design;Chandrakasan,1995

Cited by 13 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Two proposed BiCMOS inverters with enhanced performance;Ain Shams Engineering Journal;2024-01

2. Adiabatic Power Management Techniques for Metal Oxide Silicon Field Effect Transistors in Digital Logic Circuits;Highlights in Science, Engineering and Technology;2023-11-28

3. Comparative Analysis of ST, ECRL and Static Logic Style at Different Process Technologies;2023 International Conference for Advancement in Technology (ICONAT);2023-01-24

4. Subthreshold Modeling of a Tunable CMOS Schmitt Trigger;IEEE Access;2023

5. Analysis of an Inverter-Based CMOS Envelope Detector;2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS);2022-10-24

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