Improving cache locking performance of modern embedded systems via the addition of a miss table at the L2 cache level-Reference-Cited by-同舟云学术

Improving cache locking performance of modern embedded systems via the addition of a miss table at the L2 cache level

Published:2010-04 Issue:4-6 Volume:56 Page:151-162
ISSN:1383-7621
Container-title:Journal of Systems Architecture
language:en
Short-container-title:Journal of Systems Architecture

Author:

Asaduzzaman Abu,Sibai Fadi N.,Rani Manira

Publisher

Elsevier BV

Subject

Hardware and Architecture,Software

Reference26 articles.

1. A. Arnaud, I. Puaut, Dynamic Instruction Cache Locking in Hard Real-Time Systems, in: Proc. of the 14th International Conference on Real-Time and Network Systems (RNTS), IEEE, Poitiers, France, May 2006.

2. A. Asaduzzaman, N. Limbachiya, I. Mahgoub, F.N. Sibai, Evaluation of I-Cache Locking Technique for Real-Time Embedded Systems, in: Proc. of IEEE Int. Conference on Innovations in IT (IIT’07), IEEE, UAE, 2007, pp. 342–346.

3. Cache modeling and optimization for portable devices running MPEG-4 video decoder;Asaduzzaman;Int. J. Multimedia Tools Appl.,2006

4. A. Asaduzzaman, I. Mahgoub, F.N. Sibai, Impact of L1 Entire Locking and L2 Way Locking on Performance, Power Consumption, and Predictability of Multicore Real-time Systems, in: Proc. of IEEE Int. Conference on Computer Systems and Applications (AICCSA’09), IEEE, Rabat, Morocco, 2009, pp. 705–711.

5. N. Blanchford, Cell Architecture Explained Version 2. .

Cited by 10 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Survey of Techniques for Reducing Interference in Real-Time Applications on Multicore Platforms;IEEE Access;2022

2. The Potential of Programmable Logic in the Middle: Cache Bleaching;2020 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS);2020-04

3. A Dynamic Instruction Cache Locking Approach for Minimizing Worst Case Execution Time of a Single Task;IEEE Access;2020

4. A Study of Cache Management Mechanisms for Real-Time Embedded Systems;Proceedings of the 2nd International Symposium on Computer Science and Intelligent Control;2018-09-21

5. PhLock: A Cache Energy Saving Technique Using Phase-Based Cache Locking;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2018-01