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Fault and timing analysis in critical multi-core systems: A survey with an avionics perspective

  • Published:2018-06 Issue: Volume:87 Page:1-11
  • ISSN:1383-7621
  • Container-title:Journal of Systems Architecture
  • language:en
  • Short-container-title:Journal of Systems Architecture

Author:

Löfwenmark Andreas,Nadjm-Tehrani Simin

Funder

Swedish Armed Forces

Publisher

Elsevier BV

Subject

Hardware and Architecture,Software

Reference60 articles.

1. Challenges in future avionic systems on multi-core platforms;Löfwenmark,2014

2. Automotive embedded software: migration challenges to multi-core computing platforms;Macher,2015

3. Basic concepts and taxonomy of dependable and secure computing;Avizienis;IEEE Trans. Dependable Secur. Comput.,2004

4. D. K. Pradhan (Ed.), Fault-tolerant Computer System Design, Prentice-Hall, Inc., Upper Saddle River, NJ, USA, 1996.

5. Two techniques for transient software error recovery;Huang,1994

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1. An experimental approach for evaluating cache allocation policies in multicore for real-time mixed-criticality systems;2024 19th European Dependable Computing Conference (EDCC);2024-04-08

2. Timing Behavior Characterization of Critical Real-Time Systems through Hybrid Timing Analysis;2023 7th International Conference on System Reliability and Safety (ICSRS);2023-11-22

3. Software Fault Tolerance in Real-Time Systems: Identifying the Future Research Questions;ACM Computing Surveys;2023-07-17

4. Introduction;Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design;2023

5. Task-level Redundancy vs Instruction-level Redundancy against Single Event Upsets in Real-time DAG scheduling;2021 IEEE 14th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC);2021-12
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