A control-based methodology for power-performance optimization in NoCs exploiting DVFS-Reference-Cited by-同舟云学术

A control-based methodology for power-performance optimization in NoCs exploiting DVFS

Published:2015-05 Issue:5-6 Volume:61 Page:197-209
ISSN:1383-7621
Container-title:Journal of Systems Architecture
language:en
Short-container-title:Journal of Systems Architecture

Author:

Zoni Davide,Terraneo Federico,Fornaciari William

Publisher

Elsevier BV

Subject

Hardware and Architecture,Software

Reference41 articles.

1. N. Agarwal, T. Krishna, L.-S. Peh, N. Jha, Garnet: a detailed on-chip network model inside a full-system simulator, in: ISPASS, 2009.

2. A virtual platform environment for exploring power, thermal and reliability management control strategies in high-performance multicores;Bartolini,2010

3. Exploiting dynamic voltage and frequency scaling in networks on chip;Bianco,2012

4. The gem5 simulator;Binkert;SIGARCH Comput. Archit. News,2011

5. S. Bittanti, Model identification and adaptive systems, in: Pitagora Editrice, Bologna, 2004, 304p. (in italian).

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