Model checking of MARTE/CCSL time behaviors using timed I/O automata

Author:

Chen BoORCID,Li Xi,Zhou Xuehai

Funder

Suzhou

National Natural Science Foundation of China

Publisher

Elsevier BV

Subject

Hardware and Architecture,Software

Reference16 articles.

1. A predictable framework for safety-critical embedded systems;Andalam;IEEE Trans. Comput.,2014

2. Clock constraints in uml/marte ccsl, Ph.D. thesis;André,2008

3. Verifying marte/ccsl mode behaviors using uppaal;Suryadevara,2013

4. N.A. Lynch, M.R. Tuttle, An introduction to input/output automata (1988).

5. Timesquare: treat your models with logical time;DeAntoni;Objects Models Compon. Patterns,2012

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