Hardware implementation of digital image skeletonization algorithm using FPGA for computer vision applications

Author:

Srinivasa Rao Perumalla,Yedukondalu Kamatham

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Computer Vision and Pattern Recognition,Media Technology,Signal Processing

Reference24 articles.

1. Daniele Davalle, Berardino Carnevale, Luca Fanucci and Pierangelo Terreni, A real time FPGA-based solution for binary image thinning, in: Applications in Electronics Pervading Industry, Environment and Society, 2016, pp. 169–174.

2. A new FPGA/DSP- based parallel architecture for real-time image processing;Battle;Real Time Imaging,2002

3. The real-time image processing technique based on DSP;Chang;Wuhan Univ. J. Nat. Sci.,2005

4. ASIC implementation for improved character recognition and classification using SNN model;Chaturvedi,2015

5. A new contrast enhancement technique implemented on FPGA for real-time image processing;Lu,2009

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