1. Moralistically, R., Linares-Barranco, A., Jimenez-Fernandez, A., et al.: Neuromorphic LIF row-by-row multiconvolution processor for FPGA. IEEE Trans. Biomed. Circuits Syst. 13(1), 159–169 (2019)
2. Chai, Z., Liu, W., Wu, Q., et al.: FPGA virtualization mechanism based on heterogeneous Zynq platforms. J. Circuits Syst. Comput. 28(12):1950199.1–1950199.24 (2019)
3. Rui, L., Liu, X., Wang, X., et al.: The design of FPGA-based digital image processing system and research on algorithms. Int. J. Future Gener. Commun. Netw. 10(2), 41–54 (2017)
4. Esquembri, S., Nieto, J., Ruiz, M., et al.: Methodology for the implementation of real-time image processing systems using FPGAs and GPUs and their integration in EPICS using Nominal Device Support. Fusion Eng. Des. 130(MAY), 26–31 (2018)
5. Craciun, S., Kirchgessner, R., George, A.D., Lam, H., Principe, J.C.: A real-time, power-efficient architecture for mean-shift image segmentation. J. Real-Time Image Proc. 14(2), 379–394 (2014). https://doi.org/10.1007/s11554-014-0459-1