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Forensic engineering for resolving ownership problem of reusable IP core generated during high level synthesis

  • Published:2018-03 Issue: Volume:80 Page:29-46
  • ISSN:0167-739X
  • Container-title:Future Generation Computer Systems
  • language:en
  • Short-container-title:Future Generation Computer Systems

Author:

Sengupta Anirban,Kachave Deepak

Funder

Media Lab Asia, Department of Electronics and Information Technology under Ministry of Communications & IT, Government of India

Publisher

Elsevier BV

Subject

Computer Networks and Communications,Hardware and Architecture,Software

Reference41 articles.

1. A task-efficient sink node based on embedded multi-core soc for internet of things;Qiu;Future Gener. Comput. Syst.,2016

2. Adaptive bacterial foraging driven datapath optimization: Exploring power-performance tradeoff in high level synthesis;Sengupta;Elsevier J. Appl. Math. Compu.,2015

3. Techniques for the creation of digital watermarks in sequential circuit designs;Oliveira;IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.,2001

4. IP core protection of CDFGs using robust watermarking during behavioral synthesis based on user resource constraint and loop unrolling factor;Sengupta;IET Electron. Lett.,2016

5. Behavioral synthesis techniques for intellectual property protection;Koushanfar;ACM Trans. Des. Autom. Electron. Syst.,2005

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