DNN-Life: An Energy-Efficient Aging Mitigation Framework for Improving the Lifetime of On-Chip Weight Memories in Deep Neural Network Hardware Architectures
Author:
Funder
Intel Corporation
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9473901/9473226/09473943.pdf?arnumber=9473943
Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Analyzing and Mitigating Circuit Aging Effects in Deep Learning Accelerators;2024 IEEE 42nd VLSI Test Symposium (VTS);2024-04-22
2. Flip-and-Patch: A fault-tolerant technique for on-chip memories of CNN accelerators at low supply voltage;Microprocessors and Microsystems;2024-04
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4. Testability and Dependability of AI Hardware: Survey, Trends, Challenges, and Perspectives;IEEE Design & Test;2023-04
5. Dependable DNN Accelerator for Safety-Critical Systems: A Review on the Aging Perspective;IEEE Access;2023
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