Parallel code generation of synchronous programs for a many-core architecture
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Publisher
IEEE
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http://xplorestaging.ieee.org/ielx7/8337149/8341968/08342182.pdf?arnumber=8342182
Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Task Mapping and Scheduling on RISC-V MIMD Processor With Vector Accelerator Using Model-Based Parallelization;IEEE Access;2024
2. Efficient Implementation of Heterogeneous Dataflow Models using Synchronous IO Patterns;2021 24th Euromicro Conference on Digital System Design (DSD);2021-09
3. Multi-task Ada code generation from synchronous dataflow programs on multi-core: Approach and industrial study;Science of Computer Programming;2021-07
4. A Qualitative Approach to Many‐core Architecture;Multi‐Processor System‐on‐Chip 1;2021-03-26
5. A study of predictable execution models implementation for industrial data-flow applications on a multi-core platform with shared banked memory;2020 IEEE Real-Time Systems Symposium (RTSS);2020-12
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