Memory Trojan Attack on Neural Network Accelerators
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/8704855/8714721/08715027.pdf?arnumber=8715027
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1. HLS-IRT: Hardware Trojan Insertion through Modification of Intermediate Representation During High-Level Synthesis;ACM Transactions on Design Automation of Electronic Systems;2024-09-04
2. Sparrow ECC: A Lightweight ECC Approach for HBM Refresh Reduction towards Energy-efficient DNN Inference;Proceedings of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design;2024-08-05
3. Hardware Trojan Testing with Hierarchical Trojan Types Under Cognitive Biases;2024 58th Annual Conference on Information Sciences and Systems (CISS);2024-03-13
4. Hardware Trojan Attacks on the Reconfigurable Interconnections of Field-Programmable Gate Array-Based Convolutional Neural Network Accelerators and a Physically Unclonable Function-Based Countermeasure Detection Technique;Micromachines;2024-01-19
5. Tamper Resistant Design of Convolutional Neural Network Hardware Accelerator;2023 Asian Hardware Oriented Security and Trust Symposium (AsianHOST);2023-12-13
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