Effect of Si Separator in Forksheet FETs on Device Characteristics Investigated by Using In-House TCAD Process Emulator and Device Simulator
Author:
Affiliation:
1. Gwangju Insititute of Science and Technology (GIST),School of Electrical Engineering and Computer Science (EECS),Gwangju,South Korea
Funder
National Research Foundation of Korea
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10319472/10319477/10319489.pdf?arnumber=10319489
Reference8 articles.
1. TetGen, a Delaunay-based quality tetrahedral mesh generator;hang;ACM Trans Math Softw,2015
2. Transient Simulation of Semiconductor Devices Using a Deterministic Boltzmann Equation Solver
3. Forksheet FETs with Bottom Dielectric Isolation, Self-Aligned Gate Cut, and Isolation between Adjacent Source-Drain Structures
4. Forksheet FETs for advanced CMOS scaling: forksheet-nanosheet co-integration and dual work function metal gates at 17nm N-P space;mertens;2021 Symposium on VLSI Technology,2021
5. A survey of the marching cubes algorithm
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