Hardware-in-the-loop simulation of a UAV autonomous landing algorithm implemented in SoC FPGA-Reference-Cited by-同舟云学术

Hardware-in-the-loop simulation of a UAV autonomous landing algorithm implemented in SoC FPGA

Published:2022-09-21 Issue: Volume: Page:
ISSN:
Container-title:2022 Signal Processing: Algorithms, Architectures, Arrangements, and Applications (SPA)
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Author:

Szolc Hubert¹,Kryjak Tomasz¹

Affiliation:

1. Embedded Vision Systems Group, AGH University of Science and Technology,Computer Vision Laboratory,Department of Automatic Control and Robotics,Krakow,Poland

Funder

AGH University of Science and Technology

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9927524/9927746/09927847.pdf?arnumber=9927847

Reference10 articles.

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5. RFlySim: Automatic test platform for UAV autopilot systems with FPGA-based hardware-in-the-loop simulations

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