An Agile Deploying Approach for Large-Scale Workloads on CGRA-CPU Architecture
Author:
Affiliation:
1. Fudan University,State Key Laboratory of Integrated Chips and Systems,Shanghai,China
Funder
National Key R&D Program of China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10546498/10546499/10546646.pdf?arnumber=10546646
Reference18 articles.
1. DSAGEN: Synthesizing Programmable Spatial Accelerators
2. AURORA: Automated Refinement of Coarse-Grained Reconfigurable Accelerators
3. THRAM: A Template-based Heterogeneous CGRA Modeling Framework Supporting Fast DSE
4. An Architecture- Independent CGRA Compiler enabling OpenMP Applications
5. Auto-Tuning CNNs for Coarse-Grained Reconfigurable Array-Based Accelerators
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1. MLIR-to-CGRA: A Versatile MLIR-Based Compiler Framework for CGRAs;2024 IEEE 35th International Conference on Application-specific Systems, Architectures and Processors (ASAP);2024-07-24
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