Process Variation Resilient Current-Domain Analog In Memory Computing
Author:
Affiliation:
1. Indian Institute of Technology,Department of Electrical Engineering,Gandhinagar,India
Funder
Prime Minister Research Fellowship (PMRF)
SERB
Semiconductor Research Corporation (SRC)
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10136870/10136706/10137088.pdf?arnumber=10137088
Reference7 articles.
1. A Mathematical Approach Towards Quantization of Floating Point Weights in Low Power Neural Networks
2. Compute-In-Memory Using 6T SRAM for a Wide Variety of Workloads
3. Deep In-Memory Architectures in SRAM: An Analog Approach to Approximate Computing
4. CIMAT: A Compute-In-Memory Architecture for On-chip Training Based on Transpose SRAM Arrays
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1. FP-ATM: A Flexible Floating Point NOR Adder Tree Macro for In-Memory Computing;2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID);2024-01-06
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