Accelerating Gustavson-based SpMM on Embedded FPGAs with Element-wise Parallelism and Access Pattern-aware Caches
Author:
Affiliation:
1. School of Computer Science and Engineering, Nanyang Technological University,Singapore
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10136870/10136706/10136958.pdf?arnumber=10136958
Reference15 articles.
1. SpArch: Efficient Architecture for Sparse Matrix Multiplication
2. OuterSPACE: An Outer Product Based Sparse Matrix Multiplication Accelerator
3. Stop Crying Over Your Cache Miss Rate
4. Design space exploration for sparse matrix-matrix multiplication on FPGAs
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. FSpGEMM: A Framework for Accelerating Sparse General Matrix–Matrix Multiplication Using Gustavson’s Algorithm on FPGAs;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-04
2. Near-Memory Parallel Indexing and Coalescing: Enabling Highly Efficient Indirect Access for SpMV;2024 Design, Automation & Test in Europe Conference & Exhibition (DATE);2024-03-25
3. Sparse-Sparse Matrix Multiplication Accelerator on FPGA featuring Distribute-Merge Product Dataflow;2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC);2024-01-22
4. An Efficient Gustavson-Based Sparse Matrix–Matrix Multiplication Accelerator on Embedded FPGAs;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-12
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