Abstract
In light of recent work on combining control-flow and dataflow architectures on the same chip die, a new architecture based on an asymmetric multicore processor is proposed. The control-flow architectures are described as a most commonly used computer architecture today. Both multicore and manycore architectures are explained, as they are based on the same principles. A dataflow computing model assumes that data input flows through hardware as either a software or hardware dataflow implementation. In software dataflow, processors based on the control-flow paradigm process tasks based on their availability from the same queue (if there are any). In hardware dataflow architectures, the hardware is configured for a particular algorithm, and data input is streamed into the hardware, and the output is streamed back to the multicore processor for further processing. Hardware dataflow architectures are usually implemented with FPGAs. Hybrid architectures employ asymmetric multicore and manycore computer architectures that are based on the control-flow and hardware dataflow architecture, all combined on the same chip die. Advantages include faster processing time, lower power consumption (and heating), and less space needed for the hardware.
Publisher
Centre for Evaluation in Education and Science (CEON/CEES)
Reference31 articles.
1. A. Kos, V. Ranković, and S. Tomažič, "Sorting networks on Maxeler dataflow supercomputing systems, " Advances in Computers, Vol. 96, pp. 139-186, 2015;
2. V. Ranković, A. Kos, and V. Milutinović, "Bitonic merge sort implementation on the maxeler dataflow supercomputing system, " The IPSI BgD Transactions on Internet Research, Vol. 9, No. 2, pp. 5-10, 2013;
3. N. Korolija, V. Milutinovic, and S. Milosevic, "Accelerating conjugate gradient solver: temporal versus spatial data, " The IPSI BgD Transactions on Advanced Research, Vol. 3, No. 1, pp. 21-25, 2007;
4. V. Milutinovic, M. Kotlar, S. Stojanovic, I. Dundic, N. Trifunovic, and Z. Babovic, "Implementing Neural Networks by Using the DataFlow Paradigm, " In DataFlow Supercomputing Essentials, New York: Springer Cham, 2017, pp. 3-44;
5. V. Jelisavcic, I. Stojkovic, V. Milutinovic, and Z. Obradovic, "Fast learning of scale-free networks based on Cholesky factorization, " International Journal of Intelligent Systems, Vol. 33, No. 6, pp. 1322-1339, 2018;
Cited by
2 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献