Deep random forest with ferroelectric analog content addressable memory

Author:

Yin Xunzhao12ORCID,Müller Franz3ORCID,Laguna Ann Franchesca4,Li Chao1ORCID,Huang Qingrong1,Shi Zhiguo12ORCID,Lederer Maximilian3ORCID,Laleni Nellie3,Deng Shan5,Zhao Zijian5ORCID,Imani Mohsen6ORCID,Shi Yiyu5,Niemier Michael5,Hu Xiaobo Sharon5ORCID,Zhuo Cheng12ORCID,Kämpfe Thomas3ORCID,Ni Kai5ORCID

Affiliation:

1. Zhejiang University, Hangzhou, Zhejiang, China.

2. Key Laboratory of CS&AUS of Zhejiang Province, Hangzhou, China.

3. Fraunhofer IPMS, Dresden, Germany.

4. De La Salle University, Manila, Philippines.

5. University of Notre Dame, Notre Dame, IN 46614, USA.

6. University of California, Irvine, CA 92697, USA.

Abstract

Deep random forest (DRF), which combines deep learning and random forest, exhibits comparable accuracy, interpretability, low memory and computational overhead to deep neural networks (DNNs) in edge intelligence tasks. However, efficient DRF accelerator is lagging behind its DNN counterparts. The key to DRF acceleration lies in realizing the branch-split operation at decision nodes. In this work, we propose implementing DRF through associative searches realized with ferroelectric analog content addressable memory (ACAM). Utilizing only two ferroelectric field effect transistors (FeFETs), the ultra-compact ACAM cell performs energy-efficient branch-split operations by storing decision boundaries as analog polarization states in FeFETs. The DRF accelerator architecture and its model mapping to ACAM arrays are presented. The functionality, characteristics, and scalability of the FeFET ACAM DRF and its robustness against FeFET device non-idealities are validated in experiments and simulations. Evaluations show that the FeFET ACAM DRF accelerator achieves ∼10 6 ×/10× and ∼10 6 ×/2.5× improvements in energy and latency, respectively, compared to other DRF hardware implementations on state-of-the-art CPU/ReRAM.

Publisher

American Association for the Advancement of Science (AAAS)

Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Multibit Content Addressable Memory Design and Optimization Based on 3-D nand-Compatible IGZO Flash;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-08

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