Direct Integration of Ferroelectric Hafnium Zirconium Oxide as Top-Gate High−κ Dielectrics for Two-Dimensional Transistors

Abstract

Transistor miniaturization enables integrating billions on a chip but also introduces heat and mobility issues. Two-dimensional (2D) semiconductors, with their ultrathin nature, offer a promising solution to achieving superior gate control. However, the lack of insulators suitable for integration into fully scalable 2D process flows limits their practical use. Here, we report the integration of freestanding Hf_0.5Zr_0.5O₂ (HZO) membranes as top-gate high-κ dielectrics in conjunction with 2D semiconductors. The HZO dielectrics exhibit classic ferroelectric feature, boasting high dielectric constant (~ 19.5), along with low leakage current (< 2.6×10^− 6 A cm^− 2 at 1 MV cm^− 1). Capitalizing on these advantages, we fabricate molybdenum disulfide (MoS₂) transistors with HZO dielectrics, achieving an on/off ratio of 10⁹ and a subthreshold swing of 53 mV dec^− 1. Additionally, we demonstrate HZO-gated 2D transistors’s capability to implement inverter, NAND, NOR, AND, OR, XOR, XNOR logic functions and a 1-bit full adder. Finally, we create a MoS₂ transistor with a channel length of ~ 13 nm, exhibiting an on/off of over 10⁸ and SS of 70 mV dec^− 1. The successful integration of ferroelectric, high-κ HZO as a top gate material effectively addresses current challenges and paves the way for the advancement of 3D integrated circuits utilizing 2D materials.