Study of Embedded Gate Nano-Tube Tunnel Field-Effect Transistors for Extremely Low Power Application

Abstract

Abstract In this paper, we are introducing a new silicon based embedded gate tubular Tunnel FET architecture. In this transistor architecture, we have simultaneously introduce horizontal and vertical tunnelling at the source to channel junction. We were able to achieve excellent electrical characteristics such as high ION (1.4×10-3A/µm) and low IOFF (1.5×10–19 A/µm). We were also able to drastically improve in sub-threshold swing (SS) (8.5mV/dec) for application in extremely low power circuits. The proposed structure offers better immunity to SCE like DIBL, ION/IOFF ratio with reduced DIBL having value of 22mV/V and improve ION/IOFF ratio to a value of 1016. Our unique transistor architecture shows drastic reduction in Ambipolar current of order 4.5×10–16, thus, making it very useful for logic circuits. We were also able to demonstrate a high Trans-conductance value of 2.3× 10− 3 S/µm along with high cut off frequency of 176 GHz which makes it useful for mixed signal circuits. Thus, our proposed transistor architecture with excellent electrical properties makes it a suitable candidate for extremely low power mixed signal circuits.