Analyzing the Electrical Characteristics of P-gate Enhanced HEMT with C-doped Buffer Layer through Silvaco

Abstract

Abstract The C-doped P-gate-enhanced HEMT (PEHEMT) is simulated by using the Silvaco T-CAD tool. The interaction among the C acceptor trap, electron and hole in the buffer layer at different voltages promotes interesting electrical characteristic within the device. In off-state conditions, the peak electric field position shifts from the edge of gate to the edge of drain. During the process of peak electric field transfer, the gate electric field gradually saturates, and the increase rate of peak electric field shows a turning point at 350V (Vd < 600 V). As the voltage further increases (Vd > 600 V), the increase rate of the drain electric field gradually slows down and tends to saturation, and the corresponding saturated gate electric field begins to increase. The uniform, quasi- linear, and step distributions of three different C acceptor in the buffer layer exhibit different degrees of current collapse under 1 ms bias stress, with values of 21.8%, 12.7%, and 12.8%, respectively. In this work, we have provided appropriate explanations for the above phenomena.