Layer Assignment and Equal-length Routing for Disordered Pins in PCB Design

Author:

Zhang Ran1,Pan Tieyuan1,Zhu Li1,Watanabe Takahiro1

Affiliation:

1. Graduate School of Information, Production and Systems, Waseda University

Publisher

Information Processing Society of Japan

Subject

Electrical and Electronic Engineering,Computer Science Applications

Reference20 articles.

1. [1] Yan, T., Ma, Q. and Wong, M.D.F.: Advances in PCB Routing, IPSJ Trans. System LSI Design Methodology, Vol.5, pp.14-22 (2012).

2. [2] Kohira, Y., Suehiro, S. and Takahashi, A.: A Fast Longer Path Algorithm for Routing Grid with Obstacles using Bi-connectivity based Length Upper Bound, Proc. Asia and South Pacific Design Automation Conf. 2009, pp.600-605 (2009).

3. [3] Kohira, Y., Suehiro, S. and Takahashi, A.: A Fast Longer Path Algorithm for Routing Grid with Obstacles using Bi-connectivity based Length Upper Bound, IEICE Trans. Fundamentals, Vol.E92-A, No.12, pp.2971-2978 (2009).

4. [4] Kohira, Y. and Takahashi, A.: CAFE Router: A Fast Connectivity Aware Multiple Nets Routing Algorithm for Routing Grid with Obstacles, Proc. Asia and South Pacific Design Automation Conf. 2010, pp.281-286 (2010).

5. [5] Kohira, Y. and Takahashi, A.: CAFE Router: A Fast Connectivity Aware Multiple Nets Routing Algorithm for Routing Grid with Obstacles, IEICE Trans. Fundamental of Electron., Commun. and Comput., Vol.E93-A, No.12, pp.2380-2388 (2010).

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