Synthesis of composite logic gate in QCA embedding underlying regular clocking

Author:

Pal Jayanta1,Bhowmik Dhrubajyoti2,Singh Ayush3,Saha Apu4,Sen Bibhash5

Affiliation:

1. Department of Information Technology, Tripura University, Agartala, Tripura, India

2. Department of CSE, bEE, NIT Agartala, Barjala, Tripura, India

3. Department of EE, NIT Agartala, Barjala, Tripura, India

4. Department of Mathematics, NIT Agartala, Barjala, Tripura, India

5. Department of CSE, National Institute of Technology, Durgapur, West Bengal, India

Abstract

Quantum-dot Cellular Automata (QCA) has emerged as one of the alternative technologies for current CMOS technology. It has the advantage of computing at a faster speed, consuming lower power, and work at Nano- Scale. Besides these advantages, QCA logic is limited to its primitive gates, majority voter and inverter only, results in limitation of cost-efficient logic circuit realization. Numerous designs have been proposed to realize various intricate logic gates in QCA at the penalty of non-uniform clocking and improper layout. This paper proposes a Composite Gate (CG) in QCA, which realizes all the essential digital logic gates such as AND, NAND, Inverter, OR, NOR, and exclusive gates like XOR and XNOR. Reportedly, the proposed design is the first of its kind to generate all basic logic in a single unit. The most striking feature of this work is the augmentation of the underlying clocking circuit with the logic block, making it a more realistic circuit. The Reliable, Efficient, and Scalable (RES) underlying regular clocking scheme is utilized to enhance the proposed design?s scalability and efficiency. The relevance of the proposed design is best cited with coplanar implementation of 2-input symmetric functions, achieving 33% gain in gate count and without any garbage output. The evaluation and analysis of dissipated energy for both the design have been carried out. The end product is verified using the QCADesigner2.0.3 simulator, and QCAPro is employed for the study of power dissipation.

Publisher

National Library of Serbia

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Cost-efficient method for inverter reduction and proper placement in quantum-dot cellular automata;International Journal of Electronics;2022-12-13

2. A New Efficient Nanodesign of Composite Gate Based on Quantum Dot Cellular Automata;Nano;2022-12-03

3. Reversible Vigenere Cryptographic Cipher in Quantum-Dot Cellular Automata;2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON);2022-11-26

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