Cost-efficient method for inverter reduction and proper placement in quantum-dot cellular automata

Author:

Pramanik Amit Kumar12ORCID,Pal Jayanta3ORCID,Mohit Kumar4,Goswami Mrinal5ORCID,Sen Bibhash2ORCID

Affiliation:

1. Dept. of Computer Science & Engineering, Dumka Engineering College, Dumka, India

2. Department of Computer Science & Engineering, NIT Durgapur, Durgapur, India

3. Department of Information Technology, Tripura University, Suryamaninagar, India

4. Department of Computer Science, ETH Zurich, Zurich, Switzerland

5. Department of Systemics, School of Computer Science, UPES, Dehradun, India

Funder

Young Faculty Research Fellowship (YFRF) of the Visvesvaraya Ph.D. scheme

Publisher

Informa UK Limited

Subject

Electrical and Electronic Engineering

Reference58 articles.

1. The design and implementation of a robust single-layer QCA ALU using a novel fault-tolerant three-input majority gate

2. Synthesis of combinational logic using three-input majority gates

3. Banerjee, A., Mahato, D. K., Choudhuri, S., Dey, M. & Chakraborty, R. (2018). Performance evaluation of controlled inverter using quantum dot cellular automata (qca).

4. Use of Symmetric Functions Designed by QCA Gates for Next Generation IC

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1. Design and Analysis of Regular Clock Based 2:4 Decoder Using T-Gate in QCA;Advances in Intelligent Systems and Computing;2023

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