Realization of a variable resolution modified semiflash ADC based on bit segmentation scheme
Author:
Affiliation:
1. Dept. of Applied Electronics and Instrumentation Engineering, Techno Main Salt Lake, Kolkata, India
2. Instrumentation Engineering, Dept. of Applied Physics, University College of Technology, Kolkata, India
Abstract
Publisher
National Library of Serbia
Subject
General Materials Science
Reference20 articles.
1. P. Ghoshal, C. Dey and S. K. Sen, "Design of a combinational modified 8-bit semiflash analog to digital converter", In Proceedings of the 4th International Conference on Devices for Integrated Circuits (DevIC), 2021, Kalyani, India, pp. 1-5.
2. A. Razzaq and S. M. Chaudhry, "A 15-Bit 85 MS/s hybrid flash-SAR ADC in 90-nm CMOS", Circuits, Syst. Signal Process., vol. 37, pp. 1452-1478, Aug. 2017.
3. B. D. Kumar, S. K. Pandey, N. Gupta and H. Shrimali, "Design of hybrid flash-SAR ADC using an inverter based comparator in 28 nm CMOS", Microelectron. J., vol. 95, p. 104666, Jan. 2020.
4. A. Cremonesi, F. Maloberti, G. Torelli and C. Vacchi, "An 8-bittwo step flash A/D converter for video application", In Proceedings of the IEEE Custom Integrated Circuits Conference (CICC), pp. 6.3/1-6.3/4, 1989.
5. D. P. Dimitrov and T. K. Vasileva, "Eight-bit semi flash A/D converter", Hindawi Publishing Corporation, VLSI Design, vol. 2007, pp. 1-7, 2007.
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