Affiliation:
1. Ariel University, Faculty of Engineering, Dept. of Electrical Engineering, Ariel, Israel
Abstract
The continuous downscaling of CMOS technologies over the last few decades
resulted in higher Integrated Circuit (IC) density and performance. The
emergence of FinFET technology has brought with it the same reliability
issues as standard CMOS with the addition of a new prominent degradation
mechanism. The same mechanisms still exist as for previous CMOS devices,
including Bias Temperature Instability (BTI), Hot Carrier Degradation (HCD),
Electro-migration (EM), and Body Effects. A new and equally important
reliability issue for FinFET is the Self -heating, which is a crucial
complication since thermal time-constant is generally much longer than the
transistor switching times. FinFET technology is the newest technological
paradigm that has emerged in the past decade, as downscaling reached beyond
20 nm, which happens also to be the estimated mean free path of electrons at
room temperature in silicon. As such, the reliability physics of FinFET was
modified in order to fit the newly developed transistor technology. This
paper highlights the roles and impacts of these various effects and aging
mechanisms on FinFET transistors compared to planar transistors on the basic
approach of the physics of failure mechanisms to fit to a comprehensive aging
model.
Publisher
National Library of Serbia
Cited by
4 articles.
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