Development of highly reliable static random access memory for 40-nm embedded split gate-MONOS flash memory
Author:
Publisher
IOP Publishing
Subject
General Physics and Astronomy,Physics and Astronomy (miscellaneous),General Engineering
Link
http://stacks.iop.org/1347-4065/54/i=4S/a=04DC12/pdf
Reference30 articles.
1. 40nm embedded SG-MONOS flash macros for automotive with 160MHz random access for code and endurance over 10M cycles for data
2. A novel 3 volts-only, small sector erase, high density flash E/sup 2/PROM
3. A half-micron SRAM cell using a double-gated self-aligned polysilicon PMOS thin film transistor (TFT) load
4. A 2v-supply Voltage 16Mb Sram Cell With Load-lock-CVD Poly And DCS-WSix Technologies
5. A 6.93-μm/sup 2/ n-gate full CMOS SRAM cell technology with high-performance 1.8-V dual-gate CMOS for peripheral circuits
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