Bias-temperature instability on the back gate of single-layer double-gated graphene field-effect transistors-Reference-Cited by-同舟云学术

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Bias-temperature instability on the back gate of single-layer double-gated graphene field-effect transistors

Published:2016-02-24 Issue:4S Volume:55 Page:04EP03
ISSN:0021-4922
Container-title:Japanese Journal of Applied Physics
language:
Short-container-title:Jpn. J. Appl. Phys.

Author:

Illarionov Yury Yu.,Waltl Michael,Smith Anderson D.,Vaziri Sam,Ostling Mikael,Lemme Max C.,Grasser Tibor

Publisher

IOP Publishing

Subject

General Physics and Astronomy,Physics and Astronomy (miscellaneous),General Engineering

Link

http://stacks.iop.org/1347-4065/55/i=4S/a=04EP03/pdf

Reference30 articles.

1. Electric Field Effect in Atomically Thin Carbon Films

2. The rise of graphene

3. Mobility and saturation velocity in graphene on SiO2

4. A manufacturable process integration approach for graphene devices

5. A Graphene Field-Effect Device

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1. Insulators for 2D nanoelectronics: the gap to bridge;Nature Communications;2020-07-07

2. On the ESD Behavior of Large-Area CVD Graphene Transistors: Physical Insights and Technology Implications;IEEE Transactions on Electron Devices;2019-01

3. Effects of consecutive irradiation and bias temperature stress in p-channel power vertical double-diffused metal oxide semiconductor transistors;Japanese Journal of Applied Physics;2018-03-05

4. Border traps and bias-temperature instabilities in MOS devices;Microelectronics Reliability;2018-01

5. Enhanced Intrinsic Voltage Gain in Artificially Stacked Bilayer CVD Graphene Field Effect Transistors;Annalen der Physik;2017-09-20

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