SiC/Si heterojunction VDMOS breaking silicon limit by breakdown point transfer technology-Reference-Cited by-同舟云学术

SiC/Si heterojunction VDMOS breaking silicon limit by breakdown point transfer technology

Published:2018-01 Issue:1 Volume:13 Page:96-99
ISSN:1750-0443
Container-title:Micro & Nano Letters
language:en
Short-container-title:Micro & Nano Letters

Author:

Duan Baoxing¹,Lv Jianmei¹,Zhao Yihan¹,Yang Yintang¹

Affiliation:

1. Key Laboratory of the Ministry of Education for Wide Band‐Gap Semiconductor Materials and DevicesSchool of MicroelectronicsXidian UniversityNo. 2 South TaiBai RoadXi'anShaanxi710071People's Republic of China

Publisher

Institution of Engineering and Technology (IET)

Subject

Condensed Matter Physics,General Materials Science,Biomedical Engineering,Bioengineering

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1049/mnl.2017.0444

Reference17 articles.

1. Fundamentals of Power Semiconductor Devices

2. Optimization of the specific on-resistance of the COOLMOS/sup TM/

3. A Vertical Power MOSFET With an Interdigitated Drift Region Using High- $k$ Insulator

4. Theoretical Analyses of Complete 3-D Reduced Surface Field LDMOS With Folded-Substrate Breaking Limit of Superjunction LDMOS

5. New Superjunction LDMOS Breaking Silicon Limit by Electric Field Modulation of Buffered Step Doping

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