Minimum jitter‐based adaptive decision feedback equaliser for giga‐bit‐per‐second serial links
Author:
Affiliation:
1. Department of Electrical and Computer EngineeringRyerson UniversityTorontoONCanada
Publisher
Institution of Engineering and Technology (IET)
Subject
General Engineering,Energy Engineering and Power Technology,Software
Link
https://onlinelibrary.wiley.com/doi/pdf/10.1049/joe.2014.0249
Reference20 articles.
1. Inter‐signal timing skew compensation of parallel links with voltage‐mode incremental signaling;Hu A.;IEEE Trans. Circuits Syst. I.,2009
2. AustinM.:‘Decision‐feedback equalization for digital communication over dispersive channels.’IEEE Int'l Research Laboratory of Electronics Technical Report 461 August 1967
3. Design techniques for decision feedback equalization of multi‐Gbps serial data links: a state‐of‐the‐art review;Yuan F.;IET Circuits Devices Syst.,2014
4. Electrical signal processing techniques in long‐haul fiber‐optic systems;Winters J.;IEEE Trans. Commun.,1990
5. A single‐loop SS‐LMS algorithm with single‐ended integrating DFE receiver for multi‐drop DRAM interface;Cui H.;IEEE J. Solid‐State Circuits,2011
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