Ultra‐low power comparator with dynamic offset cancellation for SAR ADC
Author:
Affiliation:
1. State Key Laboratory of Wide Bandgap Semiconductor Technology DisciplinesXidian UniversityXi'an710071People's Republic of China
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://onlinelibrary.wiley.com/doi/pdf/10.1049/el.2017.2916
Reference7 articles.
1. 1‐bit quantiser with rail to rail input range for sub‐1V ΔΣ modulators;Maymandi‐Nejad M.;Electron. Lett.,2003
2. High‐speed low‐power common‐mode insensitive dynamic comparator
3. High‐speed low‐power and low‐power supply voltage dynamic comparator
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