Author:
Lajolo M.,Passerone C.,Lavagno L.
Publisher
Institution of Engineering and Technology (IET)
Subject
Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science
Reference19 articles.
1. Testing core-based systems: a symbolic methodology
2. Cadence ships Cierto VCC environment for HW/SW codesign and reports customer success. Press release, Cadence Design System. Jan. 10, 2000
3. SystemC web page. http://www.systemc.org accessed April, 2003
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