High-speed hardware implementation of a serial-in parallel-out finite field multiplier using reordered normal basis-Reference-Cited by-同舟云学术

High-speed hardware implementation of a serial-in parallel-out finite field multiplier using reordered normal basis

Published:2010 Issue:2 Volume:4 Page:168
ISSN:1751-858X
Container-title:IET Circuits, Devices & Systems
language:en
Short-container-title:IET Circuits Devices Syst.

Author:

Namin A.H.,Leboeuf K.,Muscedere R.,Wu H.,Ahmadi M.

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Control and Systems Engineering

Link

https://digital-library.theiet.org/content/journals/10.1049/iet-cds.2008.0331?crawler=true&mimetype=application/pdf

Reference32 articles.

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2. Menezes, A.J., van Oorschot, P.C., and Vanstone, S.A.: ‘Handbook of applied cryptography’, (Crc Press Series on Discrete Mathematics and Its Applications 1996 October),816 pages

3. Certicom Corp.: ‘Current public-key cryptographic systems’, White paper, http://www.certicom.com (2000)

4. Hankerson, D., Menezes, A.J., and Vanstone, S.A.: ‘Guide to elliptic curve cryptography’, (Springer 2003 December),332 pages, http://www.cacr.math.uwaterloo.ca/ecc/

5. Lidl, R., and Niederreiter, H.: ‘Finite files’, (Addison-Wesley, Reading, MA 1983)

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