Fully integrated fractional‐N phase‐locked loop for GNSS standards-Reference-Cited by-同舟云学术

Fully integrated fractional‐N phase‐locked loop for GNSS standards

Published:2019-08 Issue:13 Volume:13 Page:2391-2395
ISSN:1751-8733
Container-title:IET Microwaves, Antennas & Propagation
language:en
Short-container-title:IET Microwaves, Antennas & Propagation

Author:

Ghattan Kashani Zahra¹,Izadi Avanji Seyed Amin²

Affiliation:

1. Electrical Engineering, K.N. Toosi University of TechnologyTehranIran

2. Electrical Engineering DepartmentShahid Sattari University of Aeronautical EngineeringTehranIran

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1049/iet-map.2018.5528

Reference15 articles.

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3. A 19-mW 2.6-mm/sup 2/ L1/L2 dual-band CMOS GPS receiver

4. Class-C Harmonic CMOS VCOs, With a General Result on Phase Noise

5. Lee W.H. Cho J.D. Lee S.D.: ‘A high speed and low power phase‐frequency detector and charge‐pump’.Proc. of the ASP‐DAC'99 Asia and South Pacific Design Automation Conf. Wanchai Hong Kong January1999 pp.269–272

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